|Published (Last):||9 October 2018|
|PDF File Size:||1.49 Mb|
|ePub File Size:||5.9 Mb|
|Price:||Free* [*Free Regsitration Required]|
Features, Applications These synchronous, presettable counters feature an internal carry look-ahead for application in high-speed counting designs.
The carry output is decoded by means of a NOR gate, thus preventing spikes during the normal counting mode of operation. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed by the count-enable inputs and internal gating.
This mode of operation eliminates the output counting spikes which are normally associated with asynchronous ripple clock counters. A buffered clock input triggers the four flip-flops on the rising positive-going edge of the clock input waveform. These counters are fully programmable; that is, the outputs may be preset to either level. As presetting is synchronous, setting up a low level at the load input disables the counter and causes the outputs to agree with the setup data after the next clock pulse, regardless of the levels of the enable input.
The clear function for the DM74LSA is asynchronous; and a low level at the clear input sets all four of the flip-flop outputs LOW, regardless of the levels of clock, load, or enable inputs. The clear function for the DM74LSA is synchronous; and a low level at the clear inputs sets all four of the flip-flop outputs LOW after the next clock pulse, regardless of the levels of the enable inputs.
This synchronous clear allows the count length to be modified easily, as decoding the maximum count desired can be accomplished with one external NAND gate. The gate output is connected to the clear input to synchronously clear the counter to all low outputs. The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without additional gating. Instrumental in accomplishing this function are two count-enable inputs and a ripple carry output.
The ripple carry output thus enabled will produce a highlevel output pulse with a duration approximately equal to the high-level portion of the QA output. This high-level overflow ripple carry pulse can be used to enable successive cascaded stages. These counters feature a fully independent clock circuit. Changes made to control inputs enable T or load that will modify the operating mode have no effect until clocking occurs. The function of the counter whether enabled, disabled, loading, or counting will be dictated solely by the conditions meeting the stable set-up and hold times.
Specify by appending the suffix letter "X" to the ordering code. Product Supersedes data of September File under Integrated Circuits, IC16 Apr 16 Internal voltage regulator is electrically programmable for various LCD voltages Time calibration is electrically programmable no trimming capacitor required LCD voltage adjusts with temperature for good contrast 4.
SLPE :. A digital. Over-Current Protection. Built-in Automatic Recovery Ripple. GKG : 7. It is provided in a small-footprint, flat lead, low-profile plastic.
PDF 74161 Datasheet ( Hoja de datos )
74161 Synchronous Counter